ECE Graduate Seminar
<p> The Electrical and Computer Engineering Department cordially invites you to attend the following seminar:</p> <p> </p> <p> Non-Volatile Resistive Memory for</p> <p> High Performance Switches</p> <p> </p> <p> By</p> <p> Ms. Pragya Rasmi Shrestha</p> <p> Ph.D. Candidate, Applied Research Center,</p> <p> Department of Electrical and Computer Engineering</p> <p> Old Dominion University</p> <p> Research Fellow, Semiconductor and Dimensional</p> <p> Metrology Division, National Institute of</p> <p> Standards and Technology</p> <p> </p> <p> Friday, October 26, 2012</p> <p> 3:00 p.m. KH 224</p> <p> Host: Dr. Baumgart</p> <p> </p> <p> </p> <p> Device scaling has been effectively used to boost productivity; it has also resulted in a reduction of the cost per bit. Scaling beyond a certain threshold is going to result in severe reliability issues. The amount of cost and energy saved due to the device scaling will no longer be able to keep up with rising costs of the sophisticated fabrication and test measurements. Researchers have therefore been working on alternative technology platforms. One of them is the development of reconfigurable devices.</p> <p> Reconfigurable devices can be used to achieve better performance with same device size and have remarkable ability to adapt to the usage. The latter is the key to fault and defect tolerant design. In spite of all the benefits of reconfigurable devices, they have limited applications. This is due to the slow clock frequency and large overall device size. All this arises from the fact that the switching matrix in a reconfigurable device uses SRAM (Static Random Access Memory) for switching. The area used up by these switches in a reconfigurable device accounts for 70% of the total area. Therefore, a solution to the problem is to replace the SRAM with a high performance switch with a smaller device size. Metal-Insulator-Metal (MIM) resistive memory (RRAM) has gained much of attention due to its CMOS compatibility and simple structure. RRAMs constitute a perfect match for conventional CMOS technology replacement as the end of Moore’s Law is approached.</p> <p> This talk provides an overview of the fundamental design principles of resistive memories, and highlights a few popular RRAM device configurations and materials systems as examples. In particular, a particular RRAM device utilizing Tantalum pentoxide (Ta<sub>2</sub>O<sub>5</sub>) as solid electrolyte is described. This device is being investigated at the National Institute of Standards and Technology (NIST). Following this general RRAM introduction, a description of some of the technical challenges and difficulties faced by the RRAM community will be presented. Solutions to mitigate these difficulties for the specific RRAM device example will be shown. Two significant problems will be discussed: a) wide distribution of values and characteristics of ON and OFF states of the devices and b) high power requirement to RESET the devices. The characteristics of a device that was designed and fabricated with improved structure to achieve tighter distribution of ON and OFF states will be presented. Along with device structure, the importance and design of appropriate circuit systems to improve the distribution and to minimize high power consumption will also be discussed.</p> <p> </p> <p> </p> <p> </p>
Posted By: Linda Marshall
Date: Mon Oct 22 13:39:15 EDT 2012